LingSys
↓ 0 downloadsYour machine's memory, GPU, motherboard and network, drawn and played in the Ling design system: LingSys, a small build for USB liquid-cooler displays, LingNet for IPv4/IPv6, DNS and packets, and a LingOS edition. 64-bit and 32-bit Windows builds included.
Keywords system-monitor, visualization, network, ipv6, gpu, lcd, lingos, ling
lingfu install LingSysCode / Files (48)
src/10_head.ling
# ══════════════════════════════════════════════════════════════════════════════ # HatchSYS: the machine's memory, GPU, motherboard and network, drawn and played # in the Ling design system. # # GENERATED FILE: edit the parts in src/ and run `python tools/build.py`. # (One file on purpose: the Ling JIT does not see top-level bindings of `use`d modules.) # # Line work only: circles, squares, Daemon tiles, Chesilin rings, crosshatch. # circle = something comes in (a page read, a packet received, a frame drawn) # square = something goes out (a page written, a packet sent, a copy) # The same numbers drive an additive synth: seven channels x four partials plus four # shimmer partials, 32 audio_tone slots in all, and a short chime for every pulse. # # Sections: MAIN (system overview) | MEMORY | GPU | BOARD | NETWORK # Keys: 0 main, 1-4 section, LEFT/RIGHT section, TAB or SPACE next view, UP/DOWN pick GPU, # A auto-cycle, H hud, M mute, ESC back (quit on MAIN), Q quit. The bottom menu is clickable. # Run: ling run hatchsys.ling (run.ps1 starts the samplers for live data first) # Args: full (borderless fullscreen) | sim (ignore the .snap files) | shot (save a screenshot per view, quit) # ══════════════════════════════════════════════════════════════════════════════ bind TAU = 6.283185307179586 bind HUE = [357.0, 28.0, 46.0, 140.0, 215.0, 247.0, 285.0] bind CAT_NAME = ["KERNEL", "STANDBY", "DATA", "MODIFIED", "MAPPED", "COMPRESSED", "FREE"] bind CAT_LET = "ALBCKFM" bind ANG1 = [0.785, 0.52, 1.05, 0.0, 2.09, 1.31, 0.26] bind ORDER = [0, 2, 4, 5, 3, 1, 6] bind RATIO = [1.0, 1.5, 2.0, 2.25, 3.0, 3.75, 4.5] bind READ_W = [0.15, 0.9, 0.5, 0.0, 0.8, 0.2, 0.0] bind WRITE_W = [0.1, 0.0, 0.7, 1.0, 0.2, 0.5, 0.0] # sections and their views bind SEC_NAME = ["MAIN", "MEMORY", "GPU", "BOARD", "NETWORK"] bind SEC_HUE = [2, 4, 3, 1, 6] bind SEC_LET = "HMGBN" bind SUB_NAME = [["OVERVIEW"], ["RINGS", "TILES", "ORBITS", "WEAVE"], ["ENGINES", "VRAM", "DIALS", "FLEET"], ["LAYOUT", "CORES", "SIGNALS"], ["FLOW", "LINKS", "TRACES"]] # the seven channels of every section: ring names, lane names, pulse categories (same order as the Ling hues) bind CH_GPU = ["3D", "COMPUTE", "COPY", "DECODE", "ENCODE", "VRAM", "POWER"] bind CH_BRD = ["CORES", "MEMBUS", "PCIE", "CHIPSET", "STORAGE", "NETWORK", "THERMAL"] bind CH_NET = ["RX", "TX", "PKT IN", "PKT OUT", "TCP", "UDP", "RETRANS"] bind CH_MAIN = ["MEMORY", "GPU", "CPU", "NETWORK", "VRAM", "DISK", "HEAT"] bind CH_ALL = [CAT_NAME, CH_MAIN, CH_GPU, CH_BRD, CH_NET] bind IDM = [0, 1, 2, 3, 4, 5, 6] bind CH_LET_GPU = "3CPDEVW" bind CH_LET_BRD = "CMPSDNT" bind CH_LET_NET = "RTIOUDX" bind CH_LET_MAIN = "MGCNVDH" # state list Z, built once per frame and handed to the views and the synth bind Z_T = 0 bind Z_ROT = 1 bind Z_HS = 2 bind Z_SAT = 3 bind Z_W = 4 bind Z_H = 5 bind Z_CATS = 6 bind Z_TOTAL = 7 bind Z_ACT = 8 bind Z_RD = 9 bind Z_WR = 10 bind Z_FLT = 11 bind Z_EV = 12 bind Z_NAME = 13 bind Z_WS = 14 bind Z_PRIV = 15 bind Z_IOR = 16 bind Z_IOW = 17 bind Z_HIST = 18 bind Z_USED = 19 bind Z_ENERGY = 20 bind Z_HIL = 21 bind Z_LIVE = 22 bind Z_FH = 23 bind Z_D = 24 bind Z_STAT = 25 bind Z_MX = 26 bind Z_MY = 27 bind Z_SEC = 28 bind Z_VIEW = 29 bind Z_FRAC = 30 bind Z_LAB = 31 bind Z_ALERT = 32 # section data pack D: the smoothed readings of all four sections plus the history strips bind D_GPU = 0 bind D_BRD = 1 bind D_NET = 2 bind D_HS = 3 bind D_MEM = 4 bind D_LIVE = 5 # GPU pack: [n, names, drivers, vecs, engs, procs, sel]; one vec per GPU bind GV_TEMP = 0 bind GV_FAN = 1 bind GV_POWER = 2 bind GV_PLIM = 3 bind GV_CLK = 4 bind GV_CLKMAX = 5 bind GV_MCLK = 6 bind GV_MCLKMAX = 7 bind GV_UTIL = 8 bind GV_MUTIL = 9 bind GV_VUSED = 10 bind GV_VTOTAL = 11 bind GV_PGEN = 12 bind GV_PW = 13 bind GV_THP = 14 bind GV_THT = 15 bind GV_LEN = 16 # board pack: [info, bv, cutil, cfreq, dimms, disks, dio, sens] bind BV_UTIL = 0 bind BV_MHZ = 1 bind BV_PMAX = 2 bind BV_TEMP = 3 bind BV_INTR = 4 bind BV_DPC = 5 bind BV_CTX = 6 bind BV_SYSC = 7 bind BV_PROCS = 8 bind BV_THR = 9 bind BV_UP = 10 bind BV_DRD = 11 bind BV_DWR = 12 bind BV_DBUSY = 13 bind BV_DQ = 14 bind BV_LEN = 15 # net pack: [adapters, nv, nodes, procs] bind NV_RX = 0 bind NV_TX = 1 bind NV_PRX = 2 bind NV_PTX = 3 bind NV_BW = 4 bind NV_EST = 5 bind NV_RETX = 6 bind NV_UDP = 7 bind NV_RTT = 8 bind NV_LISTEN = 9 bind NV_TW = 10 bind NV_CW = 11 bind NV_SYN = 12 bind NV_LOOP = 13 bind NV_FAIL = 14 bind NV_LEN = 15 # history strips: 120 samples, half a second apart, each already scaled to 0..1 bind HS_N = 120 bind HS_GPU = 0 bind HS_BRD = 32 bind HS_NET = 40 bind HS_MEM = 48 bind HS_COUNT = 50